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Director of ASIC Design at Rippling Recruiting, Austin, TX

Director of ASIC Design at Rippling Recruiting in Austin, TX. $200,000 to $350,000 a year. Apply with swipeandhired.

We are looking for a Director of ASIC Design to drive the design, development, verification, and execution of high-performance AI inference chips. This role requires deep technical expertise in ASIC architecture and low-power design methodologies, along with a strong understanding of AI/ML workloads. The ideal candidate will bring a proven track record of leading ASIC teams from concept through production in a startup or fast-paced environment, and will play a central role in shaping the technical direction and execution of Positron's silicon roadmap.
This is a remote position; however, candidates must be based in the Austin, Texas metropolitan area. This location requirement allows for occasional in-person collaboration, meetings, or team events as needed.
Key Responsibilities
Technical Leadership & Architecture

Lead the ASIC development team in the design, verification, and implementation of AI inference hardware.
Define and specify ASIC architecture, microarchitecture, and roadmap in alignment with company goals and AI workload requirements.
Optimize power, performance, and area (PPA) trade-offs to meet stringent AI inference requirements, including memory subsystem optimizations.

Execution & Delivery

Oversee RTL design, physical design, verification, and validation processes across the full chip development lifecycle.
Drive Customer Owned Tooling (COT) tape-out and bring-up activities, ensuring successful first silicon validation and production ramp-up.

Cross-Functional Partnership & Vendor Management

Collaborate closely with software and prototyping teams to ensure hardware/software co-design optimizations.
Manage relationships with foundries, IP vendors, and EDA tool providers.

Team Building

Recruit, mentor, and develop a high-performing ASIC team.

Required Qualifications

A degree in Electrical Engineering, Computer Engineering, or a related field.
12+ years of experience in ASIC development, including at least 5 years in a leadership role.
A proven track record of delivering multiple ASIC/COT projects from concept to mass production.
Deep understanding of digital design, verification, physical design, and manufacturing processes.
Experience with leading AI accelerators, high-performance computing (HPC), or data center chip designs.
Strong knowledge of RTL design (Verilog/SystemVerilog), synthesis, and timing closure.
Expertise in low-power design techniques and optimizing power for very high-performance chips.
Expertise in memory subsystem optimizations.
Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics.
Excellent leadership, communication, and cross-functional collaboration skills.

Preferred Qualifications

Experience in AI/ML accelerator design or custom AI silicon.
A track record of defining and deploying a full EDA methodology based on Cadence or Synopsys tool suites.
Successful tape-out experience on 7nm, 5nm, and/or 3nm COT designs.
Understanding of chiplet-based architectures and heterogeneous computing.
Experience integrating external memory and IP modules.
Knowledge of RISC-V or custom processor development.
A track record of successful technology development within a dynamic startup environment.

Leveling & Scope
While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.
Why Join Us?

Be at the forefront of AI inference hardware innovation, with the opportunity to shape the future of AI acceleration technology.
Work alongside a world-class team of engineers and AI researchers, with a competitive compensation, equity, and benefits package.

Compensation & Benefits
The base salary range for this role is $200,000 – $350,000.

Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.

At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.
Benefits & Perks
We want you to do your best work and feel confident that you and your family are taken care of. That means comprehensive coverage, real time to rest, and support for your future.
Health and wellness

Fully company-paid medical, dental, and vision insurance for you and your dependents
Company-paid life and disability coverage, with voluntary options to add more
Supplemental hospital, critical illness, and accident coverage available

Time off and flexibility

Unlimited paid time off – we encourage everyone to truly unplug and recharge
13 paid company holidays
Remote-first culture with a company-provided computer and home office setup

Compensation and future

Competitive salary and equity
401(k) with company matching, eligible from day one

Visa Support
This position is open to candidates currently authorized to work in the U.S. We cannot provide new visa sponsorship for this role but are open to facilitating H-1B visa transfers for eligible candidates.

Equal Opportunity Employer. If you're excited about the role but don't meet every bullet, we'd still love to hear from you.

About Positron AI
Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Our first-generation ASIC, Asimov, is a cutting-edge accelerator targeting frontier AI workloads, with additional generations already underway.